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ISQED
2005
IEEE
108views Hardware» more  ISQED 2005»
13 years 10 months ago
Error Analysis for the Support of Robust Voltage Scaling
Recently, a new Dynamic Voltage Scaling (DVS) scheme has been proposed that increases energy efficiency significantly by allowing the processor to operate at or slightly below the...
David Roberts, Todd M. Austin, David Blaauw, Trevo...
ISCAS
2005
IEEE
183views Hardware» more  ISCAS 2005»
13 years 10 months ago
Battery-aware dynamic voltage scaling in multiprocessor embedded system
— In a battery powered system, a primary design consideration is the battery lifetime. Profile of current drawn from a battery determines its lifetime. Recently in [4] dynamic v...
Yuan Cai, Sudhakar M. Reddy, Irith Pomeranz, Bashi...
FPT
2005
IEEE
131views Hardware» more  FPT 2005»
13 years 10 months ago
Dynamic Voltage Scaling for Commercial FPGAs
A methodology for supporting dynamic voltage scaling (DVS) on commercial FPGAs is described. A logic delay measurement circuit (LDMC) is used to determine the speed of an inverter...
C. T. Chow, L. S. M. Tsui, Philip Heng Wai Leong, ...
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
13 years 10 months ago
DVS for On-Chip Bus Designs Based on Timing Error Correction
On-chip buses are typically designed to meet performance constraints at worst-case conditions, including process corner, temperature, IR-drop, and neighboring net switching patter...
Himanshu Kaul, Dennis Sylvester, David Blaauw, Tre...
ISLPED
2006
ACM
99views Hardware» more  ISLPED 2006»
13 years 10 months ago
Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture
In recent years, Globally Asynchronous Locally Synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever...
Grigorios Magklis, Pedro Chaparro, José Gon...
ISLPED
2006
ACM
70views Hardware» more  ISLPED 2006»
13 years 10 months ago
Sub-threshold design: the challenges of minimizing circuit energy
In this paper, we identify the key challenges that oppose subthreshold circuit design and describe fabricated chips that verify techniques for overcoming the challenges. Categorie...
Benton H. Calhoun, Alice Wang, Naveen Verma, Anant...
CASES
2006
ACM
13 years 10 months ago
Methods for power optimization in distributed embedded systems with real-time requirements
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...
SAINT
2006
IEEE
13 years 10 months ago
Energy-Efficient Scheme for Multiprocessor-Based Router Linecards
– In support of continuously increasing line rates and various Internet services, multiprocessor-based linecards have appeared in next-generation routers, significantly improving...
Malcolm Mandviwalla, Nian-Feng Tzeng
GLVLSI
2006
IEEE
155views VLSI» more  GLVLSI 2006»
13 years 10 months ago
Dynamic voltage scaling for multitasking real-time systems with uncertain execution time
Dynamic voltage scaling (DVS) for real-time systems has been extensively studied to save energy. Previous studies consider the probabilistic distributions of tasks’ execution ti...
Changjiu Xian, Yung-Hsiang Lu
ETS
2006
IEEE
129views Hardware» more  ETS 2006»
13 years 10 months ago
Dynamic Voltage Scaling Aware Delay Fault Testing
The application of Dynamic Voltage Scaling (DVS) to reduce energy consumption may have a detrimental impact on the quality of manufacturing tests employed to detect permanent faul...
Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M....