Sciweavers

GLVLSI
2003
IEEE
139views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Bounding the efforts on congestion optimization for physical synthesis
Davide Pandini, Lawrence T. Pileggi, Andrzej J. St...
GLVLSI
2003
IEEE
122views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Cooling of integrated circuits using droplet-based microfluidics
Decreasing feature sizes and increasing package densities are making thermal issues extremely important in IC design. Uneven thermal maps and hot spots in ICs cause physical stres...
Vamsee K. Pamula, Krishnendu Chakrabarty
GLVLSI
2003
IEEE
129views VLSI» more  GLVLSI 2003»
13 years 10 months ago
A system-level methodology for fast multi-objective design space exploration
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
Gianluca Palermo, Cristina Silvano, S. Valsecchi, ...
GLVLSI
2003
IEEE
161views VLSI» more  GLVLSI 2003»
13 years 10 months ago
TEM-cell and surface scan to identify the electromagnetic emission of integrated circuits
The characterization as well as the control of the electromagnetic emission of integrated circuits is an important step in the design process of state of the art integrated circui...
Timm Ostermann, Bernd Deutschmann
GLVLSI
2003
IEEE
144views VLSI» more  GLVLSI 2003»
13 years 10 months ago
A hybrid adiabatic content addressable memory for ultra low-power applications
This paper presents a hybrid adiabatic content addressable memory (CAM). The CAM uses an adiabatic switching technique to reduce the energy consumption in the match line while kee...
Aiyappan Natarajan, David Jasinski, Wayne Burleson...
GLVLSI
2003
IEEE
146views VLSI» more  GLVLSI 2003»
13 years 10 months ago
A practical CAD technique for reducing power/ground noise in DSM circuits
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktis...
GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
GLVLSI
2003
IEEE
166views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section ...
Edward Merlo, Kwang-Hyun Baek, Myung-Jun Choe
GLVLSI
2003
IEEE
225views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Interconnected rings and oscillators as gigahertz clock distribution nets
Manuel Salim Maza, Mónico Linares Aranda
GLVLSI
2003
IEEE
180views VLSI» more  GLVLSI 2003»
13 years 10 months ago
3D direct vertical interconnect microprocessors test vehicle
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...
John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan...