ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper presents a technique to improve verification at the VHDL level of digital circuits by means of a specially designed fault injection block. The injection technique allow...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
Burn-in faces significant challenges in recent CMOS technologies. The self-generated heat of each IC in a burn-in environment contributes to larger currents that can lead to furth...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
Very Deep Sub-Micron (VDSM) defects are resolved as Statistical Post-Processing™ (SPP) outliers of a new IDDQ screen. The screen applies an IDDQ pattern once to the Device Under...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
At-speed test has become a requirement in IC technologies below 180 nm. Unfortunately, test mode switching activity and IR-drop present special challenges to the successful applic...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper describes a system for performing high precision IDDQ measurement of CMOS ICs having a large peak current during operation. Although the measurement rate is at a low sp...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
A scalable laser-based timing analysis technique we call laser assisted device alteration (LADA) is introduced for the rapid isolation and analysis of defect-free performance limi...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper introduces a finite memory compactor called convolutional compactor that provides compaction ratios of test responses in excess of 100x even for a very small number of ...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
Today’s ASIC designs consist of more memory in terms of both area and number of instances. The shrinking of geometries has an even greater effect upon memories due to their tigh...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
In a carefully structured study spanning several months, the authors visited numerous companies focused on Design For Test methodologies in SoC Test, Characterization, and Failure...
ITC
2003
IEEE
13 years 9 months ago
2003
IEEE
Knowing, that the threshold voltage of the EEPROM memory cells is a key parameter to determine the overall performance of the memory, a build in structure to extract this informat...