DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, a method for the automatic sizing of analog integrated circuits is presented. Basic sizing rules, representing circuit knowledge, are set up before the sizing and a...
ASPDAC
1999
ACM
13 years 9 months ago
1999
ACM
In this paper we consider transistor sizing to reduce crosstalk. First, crosstalk noise dependency on wire width, wire spacing, driver and receiver sizes are discussed, and valida...
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper is about gate sizing under a statistical delay model. It shows we can solve the gate sizing problem exactly for a given statistical delay model. The formulation used al...
ICCAD
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
DOLAP
2004
ACM
13 years 10 months ago
2004
ACM
Computer system sizing involves estimating the amount of hardware resources needed to support a new workload not yet deployed in a production environment. In order to determine th...
IMR
2005
Springer
13 years 10 months ago
2005
Springer
This paper proposes a framework for generating sizing function in meshing assemblies. Size control is crucial in obtaining a high-quality mesh with a reduced number of elements, w...
GLVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
PATMOS
2007
Springer
13 years 10 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper presents sizing rules for basic building blocks in analog bipolar circuit design. Sizing rules efficiently capture design knowledge on the technology-specific level o...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
This paper describes a systematic approach that facilitates yield improvement of integrated circuits at the post-manufacture stage. A new Configurable Analogue Transistor (CAT) st...