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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
10 years 2 months ago
Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints
In this paper, a method for the automatic sizing of analog integrated circuits is presented. Basic sizing rules, representing circuit knowledge, are set up before the sizing and a...
Robert Schwencker, Josef Eckmueller, Helmut E. Gra...
ASPDAC
1999
ACM
143views Hardware» more  ASPDAC 1999»
10 years 2 months ago
Crosstalk Reduction by Transistor Sizing
In this paper we consider transistor sizing to reduce crosstalk. First, crosstalk noise dependency on wire width, wire spacing, driver and receiver sizes are discussed, and valida...
Tong Xiao, Malgorzata Marek-Sadowska
DATE
2000
IEEE
85views Hardware» more  DATE 2000»
10 years 3 months ago
Gate Sizing Using a Statistical Delay Model
This paper is about gate sizing under a statistical delay model. It shows we can solve the gate sizing problem exactly for a given statistical delay model. The formulation used al...
E. T. A. F. Jacobs, Michel R. C. M. Berkelaar
ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
10 years 3 months ago
Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
Ruibing Lu, Cheng-Kok Koh
DOLAP
2004
ACM
10 years 4 months ago
Developing a characterization of business intelligence workloads for sizing new database systems
Computer system sizing involves estimating the amount of hardware resources needed to support a new workload not yet deployed in a production environment. In order to determine th...
Ted J. Wasserman, Patrick Martin, David B. Skillic...
IMR
2005
Springer
10 years 4 months ago
A Computational Framework for Generating Sizing Function in Assembly Meshing
This paper proposes a framework for generating sizing function in meshing assemblies. Size control is crucial in obtaining a high-quality mesh with a reduced number of elements, w...
William Roshan Quadros, Ved Vyas, Michael L. Brewe...
GLVLSI
2006
IEEE
185views VLSI» more  GLVLSI 2006»
10 years 4 months ago
Application of fast SOCP based statistical sizing in the microprocessor design flow
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
Murari Mani, Mahesh Sharma, Michael Orshansky
PATMOS
2007
Springer
10 years 4 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
10 years 5 months ago
Sizing Rules for Bipolar Analog Circuit Design
This paper presents sizing rules for basic building blocks in analog bipolar circuit design. Sizing rules efficiently capture design knowledge on the technology-specific level o...
Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann
DATE
2009
IEEE
106views Hardware» more  DATE 2009»
10 years 5 months ago
Optimal sizing of configurable devices to reduce variability in integrated circuits
This paper describes a systematic approach that facilitates yield improvement of integrated circuits at the post-manufacture stage. A new Configurable Analogue Transistor (CAT) st...
Peter Wilson, Reuben Wilcock
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