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ICCAD
1995
IEEE
94views Hardware» more  ICCAD 1995»
15 years 8 months ago
Test register insertion with minimum hardware cost
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
Albrecht P. Stroele, Hans-Joachim Wunderlich
INFOCOM
1997
IEEE
15 years 8 months ago
Efficient Admission Control for EDF Schedulers
In this paper we present algorithms for flow admission control at an EDF link scheduler when the flows are characterized by peak rate, average rate and burst size. We show that th...
Victor Firoiu, James F. Kurose, Donald F. Towsley
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 8 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
ICCAD
1995
IEEE
170views Hardware» more  ICCAD 1995»
15 years 8 months ago
Acceleration techniques for dynamic vector compaction
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
Anand Raghunathan, Srimat T. Chakradhar