Sciweavers

ARITH
2001
IEEE
13 years 10 months ago
Leading Zero Anticipation and Detection-A Comparison of Methods
Design of the leading zero anticipator ( L a ) or detector (LZD) is pivotal to the normalization of results for addition and fused multiplication-addition in highperjormance float...
Martin S. Schmookler, Kevin J. Nowka
ARITH
2001
IEEE
13 years 10 months ago
In-Order Issue Out-of-Order Execution Floating-Point Coprocessor for CalmRISC32
Cheol-Ho Jeong, Woo-Chan Park, Tack-Don Han, Moon ...
ARITH
2001
IEEE
13 years 10 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
ARITH
2001
IEEE
13 years 10 months ago
On-line Arithmetic for Detection in Digital Communication Receivers
This paper demonstrates the advantages of using on-line arithmetic for traditional and advanced detection algorithms for communication systems. Detection is one of the core comput...
Sridhar Rajagopal, Joseph R. Cavallaro
Applied Computing
Top of PageReset Settings