138
Voted
ASPDAC
15 years 5 months ago
2001 ACM 
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...
76
Voted
ASPDAC
15 years 5 months ago
2001 ACM  136
Voted
ASPDAC
15 years 5 months ago
2001 ACM 
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
105
Voted
ASPDAC
15 years 5 months ago
2001 ACM 
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
139
Voted
ASPDAC
15 years 5 months ago
2001 ACM
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
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Hardware