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CSREAESA
2003
15 years 2 months ago
Common Mistakes in Adiabatic Logic Design and How to Avoid Them
Most so-called “adiabatic” digital logic circuit families reported in the low-power design literature are actually not truly adiabatic, in that they do not satisfy the general...
Michael P. Frank
CSREAESA
2003
15 years 2 months ago
Designing an Embedded Electronic-Prescription Application for Home-Based Telemedicine Using OSGi Framework?
The combined benefits of Open Services Gateway Initiative (OSGi) and Smart card technologies in embedded devices have made the two technologies suitable for developing middleware ...
Patrick O. Bobbie, Sailaja H. Ramisetty, Abdul-Lat...
CSREAESA
2003
15 years 2 months ago
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
Kugan Vivekanandarajah, Thambipillai Srikanthan, C...
CSREAESA
2003
15 years 2 months ago
Worst Case Execution Time Analysis for Petri Net Models of Embedded Systems
We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...
Friedhelm Stappert, Carsten Rust
CSREAESA
2003
15 years 2 months ago
Coarse-Grained DRAM Power Management
− This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that ...
Jin Hwan Park, Sarah Wu, Baback A. Izadi
Embedded Systems
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