GLVLSI
15 years 7 months ago
2003 IEEE 
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
133
Voted
VLSID
16 years 2 months ago
2003 IEEE 
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
145
Voted
DFT
15 years 7 months ago
2003 IEEE 
We discuss the use of convolutional codes to perform concurrent error detection (CED) in finite state machines (FSMs). We examine a previously proposed methodology, we identify i...
GLVLSI
15 years 7 months ago
2003 IEEE 
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
|
VLSI