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FDL
2003
IEEE
15 years 6 months ago
Design and Power Analysis in SysteC of an I2C Bus Driver
The paper presents a methodology to integrate information on power consumption in a high level functional description of a System-on-chip. The power dissipated during the executio...
Marco Caldari, Massimo Conti, Paolo Crippa, Simone...
FDL
2003
IEEE
15 years 6 months ago
Analog Circuit Modeling in SystemC
This paper proposes a methodology for the extension of SystemC to mixed signal systems. An oscillator made up of an inverter chain has been used to test the accuracy and stability...
Massimo Conti, Marco Caldari, Simone Orcioni, Gior...
FDL
2003
IEEE
15 years 6 months ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...
FDL
2003
IEEE
15 years 6 months ago
Object-Oriented ASIP Design and Synthesis
SystemC-Plus from the ODETTE project provides the ability to simulate and synthesise object-oriented specifications into hardware. The current ODETTE compiler translates each obj...
Maziar Goudarzi, Shaahin Hessabi, Alan Mycroft
FDL
2003
IEEE
15 years 6 months ago
Using Symbolic Simulation for Bounded Property Checking
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Jürgen Ruf, Prakash Mohan Peranandam, Thomas ...
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