5414 search results - page 39 / 1083 » Data representation synthesis |
ICCAD
2005
IEEE
15 years 5 months ago
2005
IEEE
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
106
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LICS
2005
IEEE
15 years 5 months ago
2005
IEEE
We provide a uniform solution to the problem of synthesizing a finite-state distributed system. An instance of the synthesis problem consists of a system architecture and a tempo...
114
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EMSOFT
2011
Springer
13 years 11 months ago
2011
Springer
Given a multi-modal dynamical system, optimal switching logic synthesis involves generating conditions for switching between the system modes such that the resulting hybrid system...
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
IFIP
1999
Springer
15 years 4 months ago
1999
Springer
: This paper presents a synthesis algorithm for pipelined circuits. The circuit is specified as a collection of independent, looselycoupled modules connected by queues. The synthe...