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» E-Process Design and Assurance Using Model Checking
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FMCAD
2006
Springer
15 years 6 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
121
Voted
CORR
2008
Springer
96views Education» more  CORR 2008»
15 years 2 months ago
New Extensions of Pairing-based Signatures into Universal (Multi) Designated Verifier Signatures
The concept of universal designated verifier signatures was introduced by Steinfeld, Bull, Wang and Pieprzyk at Asiacrypt 2003. These signatures can be used as standard publicly ve...
Damien Vergnaud
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
15 years 6 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
92
Voted
IPPS
2007
IEEE
15 years 8 months ago
FixD : Fault Detection, Bug Reporting, and Recoverability for Distributed Applications
Model checking, logging, debugging, and checkpointing/recovery are great tools to identify bugs in small sequential programs. The direct application of these techniques to the dom...
Cristian Tapus, David A. Noblet
140
Voted
CIKM
2010
Springer
15 years 1 months ago
Rank learning for factoid question answering with linguistic and semantic constraints
This work presents a general rank-learning framework for passage ranking within Question Answering (QA) systems using linguistic and semantic features. The framework enables query...
Matthew W. Bilotti, Jonathan L. Elsas, Jaime G. Ca...