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ISCAPDCS
2001
14 years 11 months ago
Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
SIGGRAPH
1994
ACM
15 years 1 months ago
Priority rendering with a virtual reality address recalculation pipeline
Virtual reality systems are placing never before seen demands on computer graphics hardware, yet few graphics systems are designed specifically for virtual reality. An address rec...
Matthew Regan, Ronald Pose
GECCO
2005
Springer
203views Optimization» more  GECCO 2005»
15 years 3 months ago
Ant colony optimization for power plant maintenance scheduling optimization
In order to maintain a reliable and economic electric power supply, the maintenance of power plants is becoming increasingly important. In this paper, a formulation that enables a...
Wai-Kuan Foong, Holger R. Maier, Angus R. Simpson
ICCD
2007
IEEE
106views Hardware» more  ICCD 2007»
15 years 1 months ago
Transparent mode flip-flops for collapsible pipelines
Prior work has shown that collapsible pipelining techniques have the potential to significantly reduce clocking activity, which can consume up to 70% of the dynamic power in moder...
Eric L. Hill, Mikko H. Lipasti
EDBT
1992
ACM
111views Database» more  EDBT 1992»
15 years 1 months ago
Pipelined Query Processing in the DBGraph Storage Model
The DBGraph storage model, designed for main memory DBMS, ensures both data storage compactness and efficient processing for all database operations. By representing the entire da...
Philippe Pucheral, Jean-Marc Thévenin