39 search results - page 2 / 8 » A Novel Reconfigurable Low Power Distributed Arithmetic Arch... |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
VLSID
2007
IEEE
13 years 11 months ago
2007
IEEE
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
FPL
2005
Springer
13 years 10 months ago
2005
Springer
This paper describes novel data-path architecture for FPGA-based multimedia processors. The proposed circuit can adapt itself at run-time to different operations and data wordleng...
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
Abstract. Programmability is an important capability that provides flexible computing devices, but it incurs significant performance and power penalties. We have proposed an archit...
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...