20 search results - page 1 / 4 » Communication Architecture Synthesis of Cascaded Bus Matrix |
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
– Modern multi-processor system-on-chip (MPSoC) designs have high bandwidth constraints which must be satisfied by the underlying communication architecture. Bus matrix based com...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
ISPD
2010
ACM
14 years 1 days ago
2010
ACM
As the thermal wall becomes the dominant factor limiting VLSI circuit performance, and the interconnect wires become the primary power consumer, power efficiency of onchip data th...
DAC
2009
ACM
14 years 6 months ago
2009
ACM
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...