16 search results - page 1 / 4 » Exploring serial vertical interconnects for 3D ICs |
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Three-dimensional integrated circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional two-dimensional...
VLSI
2010
Springer
13 years 2 months ago
2010
Springer
—This paper proposes a novel technique to exploit the high bandwidth offered by through silicon vias (TSVs). In the proposed approach, synchronous parallel 3D links are replaced ...
GLVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
The dependence of the propagation delay of the interlayer 3-D interconnects on the vertical through via location and length is investigated. For a variable vertical through via lo...
DAC
2012
ACM
11 years 7 months ago
2012
ACM
In this work, we propose a fast and accurate chip/package thermomechanical stress and reliability co-analysis tool for TSV-based 3D ICs. We also present a design optimization meth...
GLVLSI
2003
IEEE
13 years 9 months ago
2003
IEEE
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...