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» Microprocessor Based Testing for Core-Based System on Chip
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DATE
2003
IEEE
96views Hardware» more  DATE 2003»
13 years 11 months ago
Test Data Compression: The System Integrator's Perspective
Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but al...
Paul Theo Gonciari, Bashir M. Al-Hashimi, Nicola N...
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
13 years 11 months ago
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
Sergio López-Buedo, Eduardo I. Boemo
VLSI
2005
Springer
13 years 11 months ago
Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint
1 The increasing test data volume required to ensure high test quality when testing a System-on-Chip is becoming a problem since it (the test data volume) must fit the ATE (Automa...
Erik Larsson, Stina Edbom
DT
2000
88views more  DT 2000»
13 years 5 months ago
Postsilicon Validation Methodology for Microprocessors
f abstraction as applicable to break the problem's complexity, and innovating better techniques to address complexity of new microarchitectural features. Validation techniques...
Hemant G. Rotithor
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 6 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...