29 search results - page 1 / 6 » RESIST: a recursive test pattern generation algorithm for pa... |
EURODAC
1994
IEEE
13 years 9 months ago
1994
IEEE
This paper presents Resist, a recursive test pattern generation (TPG) algorithm for path delay fault testing of scan-based circuits. In contrast to other approaches, it exploits t...
GLVLSI
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
EURODAC
1994
IEEE
13 years 9 months ago
1994
IEEE
This paper presents an algorithm for generation of test patterns for strong robust path delay faults, i.e. tests that propagate the fault along a single path and additionally are ...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
- We propose a dynamic test compaction procedure to generate high-quality test patterns for path delay faults. While the proposed procedure generates a compact two-pattern test set...
DAC
2005
ACM
13 years 7 months ago
2005
ACM
In this paper we propose a test compaction method for path delay faults in a logic circuit. The method generates a compact set of two-pattern tests for faults on long paths select...