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ASPDAC
2006
ACM
158views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Process-induced skew reduction in nominal zero-skew clock trees
— This work develops an analytic framework for clock tree analysis considering process variations that is shown to correspond well with Monte Carlo results. The analysis framewor...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Physical design implementation of segmented buses to reduce communication energy
Abstract— The amount of energy consumed for interconnecting the IP-blocks is increasing significantly due to the suboptimal scaling of long wires. To limit this energy penalty, ...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
13 years 10 months ago
A dynamic test compaction procedure for high-quality path delay testing
- We propose a dynamic test compaction procedure to generate high-quality test patterns for path delay faults. While the proposed procedure generates a compact two-pattern test set...
Masayasu Fukunaga, Seiji Kajihara, Xiaoqing Wen, T...
ASPDAC
2006
ACM
124views Hardware» more  ASPDAC 2006»
13 years 10 months ago
A built-in power supply noise probe for digital LSIs
Mitsuya Fukazawa, Koichiro Noguchi, Makoto Nagata,...
ASPDAC
2006
ACM
121views Hardware» more  ASPDAC 2006»
13 years 10 months ago
A low dynamic power and low leakage power 90-nm CMOS square-root circuit
Tadayoshi Enomoto, Nobuaki Kobayashi
ASPDAC
2006
ACM
230views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Statistical Bellman-Ford algorithm with an application to retiming
— Process variations in digital circuits make sequential circuit timing validation an extremely challenging task. In this paper, a Statistical Bellman-Ford (SBF) algorithm is pro...
Mongkol Ekpanyapong, Thaisiri Watewai, Sung Kyu Li...
ASPDAC
2006
ACM
107views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Jitter decomposition in ring oscillators
Abstract— It is important to separate random jitter from deterministic jitter to quantify their contributions to the total jitter. This paper identifies the limitations of the e...
Qingqi Dou, Jacob A. Abraham
ASPDAC
2006
ACM
82views Hardware» more  ASPDAC 2006»
13 years 10 months ago
An exact algorithm for the statistical shortest path problem
Liang Deng, Martin D. F. Wong
ASPDAC
2006
ACM
105views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Speed binning aware design methodology to improve profit under parameter variations
—Designing high-performance systems with high yield under parameter variations has raised serious design challenges in nanometer technologies. In this paper, we propose a profit-...
Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saib...
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Using speculative computation and parallelizing techniques to improve scheduling of control based designs
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
Roberto Cordone, Fabrizio Ferrandi, Marco D. Santa...