Sciweavers

ASPDAC
2006
ACM
135views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Robust analytical gate delay modeling for low voltage circuits
— Sakurai-Newton (SN) delay metric [1] is a widely used closed form delay metric for CMOS gates because of simplicity and reasonable accuracy. Nevertheless it can be shown that t...
Anand Ramalingam, Sreekumar V. Kodakara, Anirudh D...
ASPDAC
2006
ACM
157views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Delay modeling and static timing analysis for MTCMOS circuits
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Naoaki Ohkubo, Kimiyoshi Usami
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Simultaneous block and I/O buffer floorplanning for flip-chip design
Chih-Yang Peng, Wen-Chang Chao, Yao-Wen Chang, Jyh...
ASPDAC
2006
ACM
115views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Hardware implementation of super minimum all digital FM demodulator
– We propose improvement of the new architecture of digital FM demodulator. This work enhances signal quality, system clock frequency, and superior than well known PLL technique ...
Nursani Rahmatullah, Arif E. Nugroho
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Configurable multi-processor architecture and its processor element design
Tsutomu Nishimura, Takuji Miki, Hiroaki Sugiura, Y...
ASPDAC
2006
ACM
89views Hardware» more  ASPDAC 2006»
13 years 11 months ago
CGTA: current gain-based timing analysis for logic cells
This paper introduces a new current-based cell timing analyzer, called CGTA, which has a higher performance than existing logic cell timing analysis tools. CGTA relies on a compac...
Shahin Nazarian, Massoud Pedram, Tao Lin, Emre Tun...
ASPDAC
2006
ACM
131views Hardware» more  ASPDAC 2006»
13 years 11 months ago
POSIX modeling in SystemC
- Early estimation of the execution time of Real-Time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires t...
Hector Posadas, Jesús Ádamez, Pablo ...
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
13 years 11 months ago
A fast logic simulator using a look up table cascade emulator
— This paper shows a new type of a cycle-based logic simulation method using a Look-Up Table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascade...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura
ASPDAC
2006
ACM
99views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Programmable numerical function generators based on quadratic approximation: architecture and synthesis method
— This paper presents an architecture and a synthesis method for programmable numerical function generators (NFGs) for trigonometric, logarithmic, square root, and reciprocal fun...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler