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DATE
2000
IEEE
92views Hardware» more  DATE 2000»
9 years 2 months ago
An Efficient Heuristic Approach to Solve the Unate Covering Problem
The classical solving approach for two-level logic minimisation reduces the problem to a special case of unate covering and attacks the latter with a (possibly limited) branch-and...
Roberto Cordone, Fabrizio Ferrandi, Donatella Sciu...
DATE
2000
IEEE
105views Hardware» more  DATE 2000»
9 years 2 months ago
Yield Improvement and Repair Trade-Off for Large Embedded Memories
In this paper, we give an overview of the trade-off to improve yield and optimize silicon manufacturing cost. The specific technology focus is on large embedded memories in comple...
Yervant Zorian
DATE
2000
IEEE
79views Hardware» more  DATE 2000»
9 years 2 months ago
Design and Test Space Exploration of Transport-Triggered Architectures
V. A. Zivkovic, Ronald J. W. T. Tangelder, Hans G....
DATE
2000
IEEE
93views Hardware» more  DATE 2000»
9 years 2 months ago
Fast Hardware-Software Coverification by Optimistic Execution of Real Processor
Sungjoo Yoo, Jong-eun Lee, Jinyong Jung, Kyungseok...
DATE
2000
IEEE
98views Hardware» more  DATE 2000»
9 years 2 months ago
Automatic Lighthouse Generation for Directed State Space Search
Previous researchers have suggested the use of “lighthouses” to act as guides in directed state space search. The drawback of using lighthouses is that the user has to manuall...
Praveen Yalagandula, Adnan Aziz, Vigyan Singhal
DATE
2000
IEEE
134views Hardware» more  DATE 2000»
9 years 2 months ago
An on Chip ADC Test Structure
In this paper, a new built-in self-test structure to test the static specifications of analog to digital converters (ADCs) is presented. A ramp signal generated by an integrator ...
Yun-Che Wen, Kuen-Jong Lee
DATE
2000
IEEE
108views Hardware» more  DATE 2000»
9 years 2 months ago
A 50 Mbit/s Iterative Turbo-Decoder
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
F. Viglione, Guido Masera, Gianluca Piccinini, Mas...
DATE
2000
IEEE
86views Hardware» more  DATE 2000»
9 years 2 months ago
System Level Design Using C++
This paper discusses the use of C++ for the design of digital systems. The paper distinguishes a number of different approaches towards the use of programming languages for digita...
Diederik Verkest, Joachim Kunkel, Frank Schirrmeis...
DATE
2000
IEEE
112views Hardware» more  DATE 2000»
9 years 2 months ago
The Road to Better Reliability and Yield Embedded DfM Tools
This paper gives an overview of the different tools, needed for accomplishing optimal IC manufacturability and rapid technology learning during the successive phases of process ma...
Kees Veelenturf
DATE
2000
IEEE
93views Hardware» more  DATE 2000»
9 years 2 months ago
Fast Evaluation of Sequence Pair in Block Placement by Longest Common Subsequence Computation
In [1], Murata et al introduced an elegant representation of block placement called sequence pair. All block placement algorithms which are based on sequence pairs use simulated a...
Xiaoping Tang, D. F. Wong, Ruiqi Tian
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