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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
9 years 10 days ago
AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...
Arun A. Nair, Lizy Kurian John, Lieven Eeckhout
TDSC
2010
111views more  TDSC 2010»
9 years 24 days ago
Using Underutilized CPU Resources to Enhance Its Reliability
—Soft errors (or Transient faults) are temporary faults that arise in a circuit due to a variety of internal noise and external sources such as cosmic particle hits. Though soft ...
Avi Timor, Avi Mendelson, Yitzhak Birk, Neeraj Sur...
VLSISP
2008
139views more  VLSISP 2008»
9 years 2 months ago
Fault Tolerance Analysis of Communication System Interleavers: the 802.11a Case Study
The study of Multiple Soft errors on memory modules caused by radiation effects represents an interesting field of current research. The fault tolerance of these devices in radiati...
Pilar Reyes, Pedro Reviriego, Juan Antonio Maestro...
DSN
2008
IEEE
9 years 4 months ago
An accurate flip-flop selection technique for reducing logic SER
The combination of continued technology scaling and increased on-chip transistor densities has made vulnerability to radiation induced soft errors a significant design concern. In...
Eric L. Hill, Mikko H. Lipasti, Kewal K. Saluja
ASPDAC
2005
ACM
106views Hardware» more  ASPDAC 2005»
9 years 4 months ago
Using loop invariants to fight soft errors in data caches
Ever scaling process technology makes embedded systems more vulnerable to soft errors than in the past. One of the generic methods used to fight soft errors is based on duplicati...
Sri Hari Krishna Narayanan, Seung Woo Son, Mahmut ...
CASES
2006
ACM
9 years 6 months ago
Cost-efficient soft error protection for embedded microprocessors
Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety c...
Jason A. Blome, Shantanu Gupta, Shuguang Feng, Sco...
FPL
2009
Springer
106views Hardware» more  FPL 2009»
9 years 7 months ago
Coarse-grained dynamically reconfigurable architecture with flexible reliability
This paper proposes a coarse-grained dynamically reconfigurable architecture, which offers flexible reliability to soft errors and aging. A notion of cluster is introduced as a ...
Dawood Alnajiar, Younghun Ko, Takashi Imagawa, Hir...
LCTRTS
2010
Springer
9 years 7 months ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
DSN
2002
IEEE
9 years 7 months ago
Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
Premkishore Shivakumar, Michael Kistler, Stephen W...
EMSOFT
2005
Springer
9 years 8 months ago
Compiler-guided register reliability improvement against soft errors
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely ...
Jun Yan, Wei Zhang
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