Sciweavers

VLSID
1997
IEEE
135views VLSI» more  VLSID 1997»
13 years 9 months ago
Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more di cult as the complexity of VLSI circuits increases, and as long as e...
Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxen...
ITC
1997
IEEE
73views Hardware» more  ITC 1997»
13 years 9 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
ITC
1999
IEEE
103views Hardware» more  ITC 1999»
13 years 9 months ago
Resistive bridge fault modeling, simulation and test generation
Resistive bridging faults in combinational CMOS circuits are studied in this work. Circuit-level models are ed to voltage behavior for use in voltage-level fault simulation and te...
Vijay R. Sar-Dessai, D. M. H. Walker
DATE
1999
IEEE
102views Hardware» more  DATE 1999»
13 years 9 months ago
Minimal Length Diagnostic Tests for Analog Circuits using Test History
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
Alfred V. Gomes, Abhijit Chatterjee
DAC
1999
ACM
13 years 9 months ago
Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. ...
ISSTA
2000
ACM
13 years 9 months ago
UML-Based integration testing
Increasing numbers of software developers are using the Unified Modeling Language (UML) and associated visual modeling tools as a basis for the design and implementation of their ...
Jean Hartmann, Claudio Imoberdorf, Michael Meising...
ICCAD
2000
IEEE
137views Hardware» more  ICCAD 2000»
13 years 9 months ago
Smart Simulation Using Collaborative Formal and Simulation Engines
computation and automatic abstraction. Second, Ketchum performs not only automatic test generation but also unreachability analysis, which enables the test generation effort to be ...
Pei-Hsin Ho, Thomas R. Shiple, Kevin Harer, James ...
ICCAD
2000
IEEE
124views Hardware» more  ICCAD 2000»
13 years 9 months ago
Deterministic Test Pattern Generation Techniques for Sequential Circuits
This paper presents new test generation techniques for improving the average-case performance of the iterative logic array based deterministic sequential circuit test generation a...
Ilker Hamzaoglu, Janak H. Patel
ICCAD
2000
IEEE
100views Hardware» more  ICCAD 2000»
13 years 9 months ago
Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits
In this paper, we propose a novel fault-oriented test generation methodology for detection and isolation of faults in analog circuits. Given the description of the circuit-underte...
Sudip Chakrabarti, Abhijit Chatterjee
ICSE
2010
IEEE-ACM
13 years 9 months ago
Test generation through programming in UDITA
We present an approach for describing tests using nondeterministic test generation programs. To write such programs, we introduce UDITA, a Java-based language with non-determinist...
Milos Gligoric, Tihomir Gvero, Vilas Jagannath, Sa...