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120
Voted
ECRTS
2008
IEEE
15 years 7 months ago
Cache-Aware Real-Time Scheduling on Multicore Platforms: Heuristics and a Case Study
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are share...
John M. Calandrino, James H. Anderson
ECRTS
2008
IEEE
15 years 7 months ago
Advanced Hierachical Event-Stream Model
Karsten Albers, Frank Bodmann, Frank Slomka
98
Voted
ECRTS
2008
IEEE
15 years 7 months ago
A Hierarchical Multiprocessor Bandwidth Reservation Scheme with Timing Guarantees
A multiprocessor scheduling scheme is presented for supporting hierarchical containers that encapsulate sporadic soft and hard real-time tasks. In this scheme, each container is a...
Hennadiy Leontyev, James H. Anderson
132
Voted
ECRTS
2008
IEEE
15 years 19 days ago
ORTEGA: An Efficient and Flexible Software Fault Tolerance Architecture for Real-Time Control Systems
Fault tolerance is an important aspect in real-time computing. In real-time control systems, tasks could be faulty due to various reasons. Faulty tasks may compromise the performa...
Xue Liu, Hui Ding, Kihwal Lee, Qixin Wang, Lui Sha
ECRTS
2008
IEEE
15 years 7 months ago
Backlog Estimation and Management for Real-Time Data Services
Real-time data services can benefit data-intensive real-time applications, e.g., e-commerce, via timely transaction processing using fresh data, e.g., the current stock prices. T...
Kyoung-Don Kang, Jisu Oh, Yan Zhou
Embedded Systems
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