Sciweavers

ISQED
2008
IEEE
92views Hardware» more  ISQED 2008»
13 years 11 months ago
Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution
Influence of manufacturing variability on circuit performance has been increasing because of finer manufacturing process and lowered supply voltage. In this paper, we focus on m...
Shinya Abe, Masanori Hashimoto, Takao Onoye
ISQED
2008
IEEE
85views Hardware» more  ISQED 2008»
13 years 11 months ago
A Statistic-Based Approach to Testability Analysis
This paper presents a statistic-based approach for evaluating the testability of nodes in combinational circuits. This testability measurement is obtained via Monte Carlo simulati...
Chuang-Chi Chiou, Chun-Yao Wang, Yung-Chih Chen
ISQED
2008
IEEE
120views Hardware» more  ISQED 2008»
13 years 11 months ago
Error-Tolerant SRAM Design for Ultra-Low Power Standby Operation
We present an error-tolerant SRAM design optimized for ultra-low standby power. Using SRAM cell optimization techniques, the maximum data retention voltage (DRV) of a 90nm 26kb SR...
Huifang Qin, Animesh Kumar, Kannan Ramchandran, Ja...
ISQED
2008
IEEE
94views Hardware» more  ISQED 2008»
13 years 11 months ago
Processor Verification with hwBugHunt
Sangeetha Sudhakrishnan, Liying Su, Jose Renau
ISQED
2008
IEEE
109views Hardware» more  ISQED 2008»
13 years 11 months ago
Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation
This paper examines latch style voltage mode sense amplifiers for operation in the sub-threshold region, where VDD<VT. We show that the offset gets worse relative to strong inv...
Joseph F. Ryan, Benton H. Calhoun
ISQED
2008
IEEE
103views Hardware» more  ISQED 2008»
13 years 11 months ago
Modeling of NBTI-Induced PMOS Degradation under Arbitrary Dynamic Temperature Variation
Negative bias temperature instability (NBTI) is one of the primary limiters of reliability lifetime in nano-scale integrated circuits. NBTI manifests itself in a gradual increase ...
Bin Zhang, Michael Orshansky
ISQED
2008
IEEE
98views Hardware» more  ISQED 2008»
13 years 11 months ago
Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)
We proposed a combined magnetic and circuit level technique to explore the design methodology of SpinTorque Transfer RAM (SPRAM). A dynamic magnetic model of magnetic tunneling ju...
Yiran Chen, Xiaobin Wang, Hai Li, Harry Liu, Dimit...
ISQED
2008
IEEE
103views Hardware» more  ISQED 2008»
13 years 11 months ago
Process Variation Characterization and Modeling of Nanoparticle Interconnects for Foldable Electronics
— Designers require variational information for robust designs. Characterization of such information can be costly for the novel nanoparticle interconnect process, which utilize ...
Rasit Onur Topaloglu