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ICCAD
2005
IEEE
200views Hardware» more  ICCAD 2005»
15 years 5 months ago
CDMA/FDMA-interconnects for future ULSI communications
Future inter- and intra-ULSI interconnect systems demand extremely high data rates as well as bi-directional multi-I/O concurrent service, re-configurable computing/processing arc...
M. Frank Chang
ICCAD
2005
IEEE
199views Hardware» more  ICCAD 2005»
15 years 2 months ago
FinFETs for nanoscale CMOS digital integrated circuits
Suppression of leakage current and reduction in device-todevice variability will be key challenges for sub-45nm CMOS technologies. Non-classical transistor structures such as the ...
Tsu-Jae King
ICCAD
2005
IEEE
176views Hardware» more  ICCAD 2005»
15 years 5 months ago
Statistical gate sizing for timing yield optimization
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
Debjit Sinha, Narendra V. Shenoy, Hai Zhou
ICCAD
2005
IEEE
168views Hardware» more  ICCAD 2005»
15 years 5 months ago
Statistical timing analysis driven post-silicon-tunable clock-tree synthesis
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...
Jeng-Liang Tsai, Lizheng Zhang
ICCAD
2005
IEEE
160views Hardware» more  ICCAD 2005»
15 years 5 months ago
Equivalence verification of polynomial datapaths with fixed-size bit-vectors using finite ring algebra
— This paper addresses the problem of equivalence verification of RTL descriptions. The focus is on datapathoriented designs that implement polynomial computations over fixed-s...
Namrata Shekhar, Priyank Kalla, Florian Enescu, Si...
Hardware
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