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    RSP
    2008
    IEEE
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    From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
    16 years 24 days ago
    From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
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    ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
    Olivier Muller, Amer Baghdadi, Michel Jéz&e...
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    RSP
    2008
    IEEE
    154views Control Systems» more  RSP 2008»
    ASIP-controlled Inverse Integer Transform for H.264/AVC Compression
    16 years 24 days ago
    ASIP-controlled Inverse Integer Transform for H.264/AVC Compression
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    N. T. Ngo, T. T. T. Do, T. M. Le, Y. S. Kadam, Ami...
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    RSP
    2008
    IEEE
    134views Control Systems» more  RSP 2008»
    Integrating Abstract NoC Models within MPSoC Design
    16 years 24 days ago
    Integrating Abstract NoC Models within MPSoC Design
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    Edson Ifarraguirre Moreno, Katalin Maria Popovici,...
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    RSP
    2008
    IEEE
    120views Control Systems» more  RSP 2008»
    Co-design Architecture and Implementation for Point-Based Rendering on FPGAs
    16 years 24 days ago
    Co-design Architecture and Implementation for Point-Based Rendering on FPGAs
    Download  www12.informatik.uni-erlangen.de
    Current graphic cards include advanced graphic processing units to accelerate the rendering of 3D objects with millions of polygons. As object models grow in complexity, the rende...
    Mateusz Majer, Stefan Wildermann, Josef Angermeier...
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    RSP
    2008
    IEEE
    118views Control Systems» more  RSP 2008»
    Functional DIF for Rapid Prototyping
    16 years 24 days ago
    Functional DIF for Rapid Prototyping
    Download  www.ece.umd.edu
    Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity in...
    William Plishker, Nimish Sane, Mary Kiemb, Kapil A...
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