ASPDAC
2001
ACM
14 years 1 months ago
2001
ACM
Clock-tuning has been classified as important but tough tasks due to the non-convex nature caused by the skew requirements. As a result, all existing mathematical programming appr...
PODC
2010
ACM
14 years 1 months ago
2010
ACM
We study the problem of clock synchronization in highly dynamic networks, where communication links can appear or disappear at any time. The nodes in the network are equipped with...
ASPDAC
2007
ACM
14 years 1 months ago
2007
ACM
- Current industry trends in system design -- multiple clocks, clocks with arbitrary frequency ratios, multi-phased clocks, gated clocks, and level-sensitive latches, combined with...
ASPDAC
2007
ACM
14 years 1 months ago
2007
ACM
Abstract-- Nanometer VLSI systems demand robust clock distribution network design for increased process and operating condition variabilities. In this paper, we propose minimum clo...
SIGCOMM
1994
ACM
14 years 1 months ago
1994
ACM
The Network Time Protocol (NTP) is widely deployed in the Internet to synchronize computer clocks to each other and to international standards via telephone modem, radio and satel...
ICCAD
1993
IEEE
14 years 1 months ago
1993
IEEE
We have proposed an e cient measure to reduce the clock skew by assigning the clock network with variable branch widths. This measure has long been used for \H" clock tree. T...
DAC
1996
ACM
14 years 1 months ago
1996
ACM
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
DAC
1997
ACM
14 years 1 months ago
1997
ACM
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
ICCAD
1997
IEEE
14 years 1 months ago
1997
IEEE
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
EDCC
1999
Springer
14 years 1 months ago
1999
Springer
In this paper we present a new fault tolerant clock synchronization algorithm called the Fault Tolerant Daisy Chain algorithm. It is intended for internal clock synchronization of...