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VTS
2002
IEEE
121views Hardware» more  VTS 2002»
13 years 9 months ago
Very Low Voltage Testing of SOI Integrated Circuits
Very Low Voltage (VLV) testing has been proposed to increase flaw detection in bulk silicon CMOS integrated circuits and this paper explores these and additional advantages in the...
Eric MacDonald, Nur A. Touba
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
13 years 9 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
FPGA
2003
ACM
156views FPGA» more  FPGA 2003»
13 years 9 months ago
Architectures and algorithms for synthesizable embedded programmable logic cores
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...
Noha Kafafi, Kimberly Bozman, Steven J. E. Wilton
FPGA
2003
ACM
154views FPGA» more  FPGA 2003»
13 years 9 months ago
Parallel placement for field-programmable gate arrays
Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we ...
Pak K. Chan, Martine D. F. Schlag
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
13 years 9 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
ITC
2003
IEEE
108views Hardware» more  ITC 2003»
13 years 9 months ago
Backplane Test Bus Applications For IEEE STD 1149.1
Prior to the mid 1980s, the dominance of through-hole packaging of integrated circuits (ICs) provided easy access to nearly every pin of every chip on a printed circuit board. Pro...
Clayton Gibbs
GLVLSI
2003
IEEE
161views VLSI» more  GLVLSI 2003»
13 years 9 months ago
TEM-cell and surface scan to identify the electromagnetic emission of integrated circuits
The characterization as well as the control of the electromagnetic emission of integrated circuits is an important step in the design process of state of the art integrated circui...
Timm Ostermann, Bernd Deutschmann
GLVLSI
2003
IEEE
180views VLSI» more  GLVLSI 2003»
13 years 9 months ago
3D direct vertical interconnect microprocessors test vehicle
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...
John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan...
SBCCI
2004
ACM
134views VLSI» more  SBCCI 2004»
13 years 10 months ago
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
Gabriella Trucco, Giorgio Boselli, Valentino Liber...
ISPD
2005
ACM
151views Hardware» more  ISPD 2005»
13 years 10 months ago
Thermal via placement in 3D ICs
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
Brent Goplen, Sachin S. Sapatnekar