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DAC
2011
ACM
9 years 2 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li
ETS
2010
IEEE
153views Hardware» more  ETS 2010»
10 years 1 months ago
Analysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes
ÑIn this paper, we present a comparative study on the effects of resistive-bridging defects in the SRAM core-cells, considering different technology nodes. In particular, we analy...
Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio,...
ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
10 years 4 months ago
Power grid analysis benchmarks
ACT Benchmarks are an immensely useful tool in performing research since they allow for rapid and clear comparison between different approaches to solving CAD problems. Recent expe...
Sani R. Nassif
ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
10 years 6 months ago
Integrated power supply planning and floorplanning
One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply volt...
I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz...
ICES
2001
Springer
107views Hardware» more  ICES 2001»
10 years 7 months ago
Polymorphic Electronics
This paper introduces the concept of polymorphic electronics (polytronics) –referring to electronics with superimposed built-in functionality. A function change does not require ...
Adrian Stoica, Ricardo Salem Zebulum, Didier Keyme...
ITC
2003
IEEE
146views Hardware» more  ITC 2003»
10 years 8 months ago
A New Approach for Low Power Scan Testing
As semiconductor manufacturing technology advances, power dissipation and noise in scan testing has become a critical problem. In our studies on practical LSI manufacturing, we ha...
Takaki Yoshida, Masafumi Watari
ATS
2005
IEEE
144views Hardware» more  ATS 2005»
10 years 8 months ago
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing
—Test application at reduced power supply voltage (low-voltage testing) or reduced temperature (low-temperature testing) can improve the defect coverage of a test set, particular...
Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Bec...
ISCAS
2006
IEEE
84views Hardware» more  ISCAS 2006»
10 years 8 months ago
Power supply variation effects on timing characteristics of clocked registers
— Violations in the timing constraints of a clocked register can cause a synchronous system to malfunction. The effects of variations in the power supply voltage (VDD) on the tim...
William R. Roberts, Dimitrios Velenis
AHS
2006
IEEE
112views Hardware» more  AHS 2006»
10 years 8 months ago
Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage
Polymorphic electronics provides a new way for obtaining circuits that are able to perform two or more functions depending on the environment in which they operate. These function...
Lukás Sekanina, Lukás Starecek, Zbys...
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
10 years 11 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
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