GLVLSI
2007
IEEE
13 years 8 months ago
2007
IEEE
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
GLVLSI
2007
IEEE
13 years 8 months ago
2007
IEEE
GLVLSI
2007
IEEE
13 years 8 months ago
2007
IEEE
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
Abstract—Microfluidics-based biochips are revolutionizing highthroughput sequencing, parallel immunoassays, clinical diagnostics, and drug discovery. These devices enable the pre...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
A novel design approach for simultaneous power and stability (static noise margin, SNM) optimization of nanoCMOS static random access memory (SRAM) is presented. A 45nm single-end...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
In this paper, we propose a new hetero-material stepped gate (HSG) SOI LDMOS in which the gate is divided into three sections - an n+ gate sandwiched between two p+ gates and the ...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
We propose a method for diagnosis of parametric faults in analog circuits using polynomial coefficients of the circuit model [15]. As a sequel to our recent work [14], where circ...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
—We propose a compact model for small signal non quasi static analysis of long channel symmetric double gate MOSFET. The model is based on the EKV formalism and is valid in all r...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE