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    EURODAC
    1994
    IEEE
    377views VHDL» more  EURODAC 1994»
    VHDL switch level fault simulation
    13 years 10 months ago
    VHDL switch level fault simulation
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    Christopher A. Ryan, Joseph G. Tront
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    EURODAC
    1994
    IEEE
    272views VHDL» more  EURODAC 1994»
    A transformation for integrating VHDL behavioral specification with synthesis and software generation
    13 years 10 months ago
    A transformation for integrating VHDL behavioral specification with synthesis and software generation
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    Frank Vahid, Daniel D. Gajski, Sanjiv Narayan
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    EURODAC
    1994
    IEEE
    149views VHDL» more  EURODAC 1994»
    A flexible access control mechanism for CAD frameworks
    13 years 9 months ago
    A flexible access control mechanism for CAD frameworks
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    A. J. van der Hoeven, K. Olav ten Bosch, Rene van ...
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    EURODAC
    1994
    IEEE
    119views VHDL» more  EURODAC 1994»
    Multilevel generalization of relaxation algorithms for circuit simulation
    13 years 10 months ago
    Multilevel generalization of relaxation algorithms for circuit simulation
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    Vladimir B. Dmitriyev-Zdorov
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    EURODAC
    1994
    IEEE
    115views VHDL» more  EURODAC 1994»
    Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path
    13 years 10 months ago
    Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path
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    Klaus Schneider, Thomas Kropf, Ramayya Kumar
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