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    ARVLSI
    1995
    IEEE
    220views VLSI» more  ARVLSI 1995»
    Optimization of combinational and sequential logic circuits for low power using precomputation
    15 years 8 months ago
    Optimization of combinational and sequential logic circuits for low power using precomputation
    Download  reference.kfupm.edu.sa
    Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
    José Monteiro, John Rinderknecht, Srinivas ...
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    FCCM
    1995
    IEEE
    135views VLSI» more  FCCM 1995»
    Architectural descriptions for FPGA circuits
    15 years 8 months ago
    Architectural descriptions for FPGA circuits
    Download  www.dcs.gla.ac.uk
    FPGA-based synthesis tools require information about behaviour and architectural to make effective use of the limited number of cells typically available. A hardware description l...
    Satnam Singh
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    ARVLSI
    1995
    IEEE
    179views VLSI» more  ARVLSI 1995»
    Algorithms for the optimal state assignment of asynchronous state machines
    15 years 8 months ago
    Algorithms for the optimal state assignment of asynchronous state machines
    Download  www.cs.columbia.edu
    This paper presents a method for the optimal state assignment of asynchronous state machines. Unlike state assignment for synchronous state machines, state codes must be chosen ca...
    Robert M. Fuhrer, Bill Lin, Steven M. Nowick
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    VLSID
    1995
    IEEE
    113views VLSI» more  VLSID 1995»
    VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes
    15 years 8 months ago
    VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes
    Download  home.dei.polimi.it
    Luca Penzo, Donatella Sciuto, Cristina Silvano
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    ARVLSI
    1995
    IEEE
    124views VLSI» more  ARVLSI 1995»
    An evaluation of bipartitioning techniques
    15 years 8 months ago
    An evaluation of bipartitioning techniques
    Download  www.ee.washington.edu
    Logic partitioning is an important issue in VLSI CAD, and has been an area of active research for at least the last 25 years. Numerous approaches have been developed and many diff...
    Scott Hauck, Gaetano Borriello
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