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ARVLSI
1995
IEEE
220views VLSI» more  ARVLSI 1995»
15 years 4 months ago
Optimization of combinational and sequential logic circuits for low power using precomputation
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
José Monteiro, John Rinderknecht, Srinivas ...
125
Voted
FCCM
1995
IEEE
135views VLSI» more  FCCM 1995»
15 years 4 months ago
Architectural descriptions for FPGA circuits
FPGA-based synthesis tools require information about behaviour and architectural to make effective use of the limited number of cells typically available. A hardware description l...
Satnam Singh
ARVLSI
1995
IEEE
132views VLSI» more  ARVLSI 1995»
15 years 4 months ago
Standard CMOS active pixel image sensors for multimedia applications
The task of image acquisition is completely dominated by CCD-based sensors fabricated on specialized process lines. These devices provide an essentially passive means of detecting...
Alex G. Dickinson, Bryan D. Ackland, El-Sayed Eid,...
102
Voted
VLSID
1995
IEEE
113views VLSI» more  VLSID 1995»
15 years 3 months ago
VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes
Luca Penzo, Donatella Sciuto, Cristina Silvano
ARVLSI
1995
IEEE
78views VLSI» more  ARVLSI 1995»
15 years 4 months ago
A technique for high-speed, fine-resolution pattern generation and its CMOS implementation
This paper presents an architecture for generating a high-speed data pattern with precise edge placement resolution by using the matched delay technique. The technique involves ...
Gary C. Moyer, Mark Clements, Wentai Liu, Toby Sch...
VLSI
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