209
click to vote
FMCAD
16 years 9 days ago
2004 Springer
Most symbolic model checkers are based on either Binary Decision Diagrams (BDDs), which may grow exponentially large, or Satisfiability (SAT) solvers, whose time requirements rapi...
199
click to vote
FMCAD
15 years 10 months ago
2004 Springer
This work presents a memory-efficient All-SAT engine which, given a propositional formula over sets of important and non-important variables, returns the set of all the assignments...
194
click to vote
FMCAD
15 years 10 months ago
2004 Springer
Abstract. Probabilistic techniques for verification of finite-state transition systems offer huge memory savings over deterministic techniques. The two leading probabilistic scheme...
192
click to vote
FMCAD
15 years 10 months ago
2004 Springer
We present a functional approach, based on the ACL2 logic, for the specification of system on a chip communication architectures. Our decomposition of the communications allows the...
191
click to vote
FMCAD
16 years 9 days ago
2004 Springer
Abstract. We relate two well-studied methodologies in deductive verification of operationally modeled sequential programs, namely the use of inductive invariants and clock functio...
|