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ICCD
2007
IEEE
746views Hardware» more  ICCD 2007»
15 years 9 months ago
Hardware design of a Binary Integer Decimal-based floating-point adder
Because of the growing importance of decimal floating-point (DFP) arithmetic, specifications for it are included in the IEEE Draft Standard for Floating-point Arithmetic (IEEE P75...
Charles Tsen, Sonia Gonzalez-Navarro, Michael J. S...
SBACPAD
2007
IEEE
554views Hardware» more  SBACPAD 2007»
15 years 6 months ago
Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Ped...
ISQED
2007
IEEE
372views Hardware» more  ISQED 2007»
15 years 6 months ago
From Finance to Flip Flops: A Study of Fast Quasi-Monte Carlo Methods from Computational Finance Applied to Statistical Circuit
Problems in computational finance share many of the characteristics that challenge us in statistical circuit analysis: high dimensionality, profound nonlinearity, stringent accura...
Amith Singhee, Rob A. Rutenbar
ISCAS
2007
IEEE
371views Hardware» more  ISCAS 2007»
15 years 6 months ago
FIR Filter Approximation by IIR Filters Based on Discrete-Time Vector Fitting
— We present a novel way of approximating FIR filters by IIR structures through generalizing the vector fitting (VF) algorithm, popularly used in continuous-time frequency-doma...
Ngai Wong, Chi-Un Lei
AHS
2007
IEEE
349views Hardware» more  AHS 2007»
15 years 6 months ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
Hardware
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