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121
Voted
VTS
2008
IEEE
136views Hardware» more  VTS 2008»
15 years 6 months ago
Test-Pattern Grading and Pattern Selection for Small-Delay Defects
Timing-related defects are becoming increasingly important in nanometer technology designs. Small delay variations induced by crosstalk, process variations, powersupply noise, as ...
Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Te...
100
Voted
VTS
2008
IEEE
119views Hardware» more  VTS 2008»
15 years 6 months ago
Error Sequence Analysis
With increasing IC process variation and increased operating speed, it is more likely that even subtle defects will lead to the malfunctioning of a circuit. Various fault models, ...
Jaekwang Lee, Intaik Park, Edward J. McCluskey
94
Voted
VTS
2008
IEEE
104views Hardware» more  VTS 2008»
15 years 6 months ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
115
Voted
VTS
2008
IEEE
83views Hardware» more  VTS 2008»
15 years 6 months ago
LS-TDF: Low-Switching Transition Delay Fault Pattern Generation
— Higher chip densities and the push for higher performance have continued to drive design needs. Transition delay fault testing has become the preferred method for ensuring thes...
Jeremy Lee, Mohammad Tehranipoor
Hardware
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