ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
ISQED
2006
IEEE
13 years 11 months ago
2006
IEEE
We propose an accurate architecture-level power estimation method for SRAM memories. This hybrid method is composed of an analytical part for dynamic power estimation and a circui...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
A new circuit technique is proposed in this paper for simultaneously reducing the subthreshold and gate oxide leakage power in domino logic circuits. PMOS-only sleep transistors ar...
ICCAD
2006
IEEE
13 years 11 months ago
2006
IEEE
Traditionally, at early design stages, leakage power is associated with the number of transistors in a design. Hence, intuitively an implementation with minimum resource usage wou...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper we present a state dependent analytical leakage power model for FPGAs. The model accounts for subthreshold leakage and gate leakage in FPGAs, since these are the two...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
VLSID
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper we demonstrate the impact of the floorplan on the temperature-dependent leakage power of a System on Chip (SoC). We propose a novel system level temperature aware a...
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Parameter variation is detrimental to a processor’s frequency and leakage power. One proposed technique to mitigate it is Fine-Grain Body Biasing (FGBB), where different parts o...
ISQED
2007
IEEE
13 years 11 months ago
2007
IEEE
We propose a methodology and power models for an accurate high-level power estimation of physically partitioned and power-gated SRAM arrays. The models offer accurate estimation o...