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    VLSID
    1994
    IEEE
    124views VLSI» more  VLSID 1994»
    ILP-Based Scheduling with Time and Resource Constraints in High Level Synthesis
    15 years 5 months ago
    ILP-Based Scheduling with Time and Resource Constraints in High Level Synthesis
    Download  www.cs.kent.edu
    In this paper, we present a formal analysis of the constraints of the scheduling problem, and evaluate the structure of the scheduling polytope described by those constraints. Pol...
    Samit Chaudhuri, Robert A. Walker
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    VLSID
    1994
    IEEE
    151views VLSI» more  VLSID 1994»
    A CORDIC Based Programmable DXT Processor Array
    15 years 5 months ago
    A CORDIC Based Programmable DXT Processor Array
    Download  eprints.iisc.ernet.in
    A CORDIC based processor array which can be programmed by switch settings to compute the Discrete Hariley, Cosine or Sine lhnsforms or their inverses is described. Through a novel...
    V. K. Anuradha, V. Visvanathan
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    VLSID
    1994
    IEEE
    108views VLSI» more  VLSID 1994»
    A New Genetic Algorithm for the Channel Routing Problem
    15 years 5 months ago
    A New Genetic Algorithm for the Channel Routing Problem
    Download  www.cs.ou.edu
    Jens Lienig, Krishnaiyan Thulasiraman
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    VLSID
    1994
    IEEE
    113views VLSI» more  VLSID 1994»
    A Methodology for Architecture Synthesis of Cascaded IIR Filters on TLU FPGAs
    15 years 5 months ago
    A Methodology for Architecture Synthesis of Cascaded IIR Filters on TLU FPGAs
    Download  eprints.iisc.ernet.in
    In this paper, we propose an architecture synthesis methodolog `to realize cascaded Infinite Impulse Response (IIRJfilter in Table Look Up (TLU) Field Progmmmable Gate A m y s (FP...
    G. N. Rathna, S. K. Nandy, K. Parthasarathy
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    VLSID
    1994
    IEEE
    82views VLSI» more  VLSID 1994»
    High Speed Digital Filtering on SRAM-Based FPGAs
    15 years 5 months ago
    High Speed Digital Filtering on SRAM-Based FPGAs
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    A. Giri, V. Visvanathan, S. K. Nandy, S. K. Ghosha...
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