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PATMOS
2004
Springer
15 years 2 months ago
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to tran...
Geoff V. Merrett, Bashir M. Al-Hashimi
PATMOS
2004
Springer
15 years 2 months ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
PATMOS
2004
Springer
15 years 2 months ago
Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems
Portableembeddeddevicesmustpresentlyrunmultimediaandwireless network applications with enormous computational performance requirements at a low energy consumption. In these applica...
David Atienza, Stylianos Mamagkakis, Francky Catth...
PATMOS
2004
Springer
15 years 2 months ago
Physical Extension of the Logical Effort Model
Abstract. The logical effort method has appeared very convenient for fast estimation and optimization of single paths. However it necessitates a calibration of all the gates of the...
B. Lasbouygues, Robin Wilson, Philippe Maurine, Na...
PATMOS
2004
Springer
15 years 2 months ago
Optimal Logarithmic Representation in Terms of SNR Behavior
This paper investigates the Signal-to-Noise Ratio (SNR) performance of the Logarithmic Number System (LNS) representation against the SNR performance of the fixed-point representa...
Panagiotis D. Vouzis, Vassilis Paliouras
Modeling and Simulation
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