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DFT
2004
IEEE
134views VLSI» more  DFT 2004»
15 years 5 months ago
On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars
Defect tolerance is an extremely important aspect in nano-scale electronics as the bottom-up selfassembly fabrication process results in a significantly higher defect density comp...
Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lomb...
DFT
2004
IEEE
90views VLSI» more  DFT 2004»
15 years 5 months ago
An XOR Based Reed-Solomon Algorithm for Advanced RAID Systems
In this paper, a simple codec algorithm based on Reed-Solomon (RS) codes is proposed for erasure correcting in RAID (Redundant Array of Independent Disks) level 6 systems. Unlike ...
Ping-Hsun Hsieh, Ing-Yi Chen, Yu-Ting Lin, Sy-Yen ...
DFT
2004
IEEE
174views VLSI» more  DFT 2004»
15 years 5 months ago
Defect Avoidance in a 3-D Heterogeneous Sensor
A 3D Heterogeneous Sensor using a stacked chip is investigated. Optical Active Pixel Sensor and IR Bolometer detectors are combined to create a multispectral pixel for aligned col...
Glenn H. Chapman, Vijay K. Jain, Shekhar Bhansali
DFT
2004
IEEE
93views VLSI» more  DFT 2004»
15 years 5 months ago
First Level Hold: A Novel Low-Overhead Delay Fault Testing Technique
This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Rayc...
126
Voted
DFT
2004
IEEE
94views VLSI» more  DFT 2004»
15 years 5 months ago
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes
This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n1, m, 3) convolutional...
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman ...
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