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154
Voted
FCCM
2004
IEEE
130views VLSI» more  FCCM 2004»
15 years 6 months ago
Hyperreconfigurable Architectures for Fast Run Time Reconfiguration
Dynamically reconfigurable architectures or systems are able to reconfigure their function and/or structure to suit changing needs of a computation during run time. The increasing...
Sebastian Lange, Martin Middendorf
145
Voted
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
15 years 6 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
140
Voted
FCCM
2004
IEEE
269views VLSI» more  FCCM 2004»
15 years 6 months ago
FPGA Based Network Intrusion Detection using Content Addressable Memories
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). Current software-based NIDS are too compute intensive and can not ...
Long Bu, John A. Chandy
136
Voted
FCCM
2004
IEEE
129views VLSI» more  FCCM 2004»
15 years 6 months ago
Design Patterns for Reconfigurable Computing
It is valuable to identify and catalog design patterns for reconfigurable computing. These design patterns are canonical solutions to common and recurring design challenges which ...
André DeHon, Joshua Adams, Michael DeLorimi...
135
Voted
FCCM
2004
IEEE
103views VLSI» more  FCCM 2004»
15 years 6 months ago
A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder
The development of turbo codes has allowed for nearShannon limit information transfer in modern communication systems. Although turbo decoding is viewed as superior to alternate d...
Jian Liang, Russell Tessier, Dennis Goeckel
VLSI
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