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93
Voted
HPCA
2006
IEEE
15 years 9 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
HPCA
2006
IEEE
15 years 9 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
HPCA
2006
IEEE
15 years 9 months ago
Phase characterization for power: evaluating control-flow-based and event-counter-based techniques
Computer systems increasingly rely on dynamic, phasebased system management techniques, in which system hardware and software parameters may be altered or tuned at runtime for dif...
Canturk Isci, Margaret Martonosi
HPCA
2006
IEEE
15 years 9 months ago
InfoShield: a security architecture for protecting information usage in memory
Cyber theft is a serious threat to Internet security. It is one of the major security concerns by both network service providers and Internet users. Though sensitive information c...
Guofei Gu, Hsien-Hsin S. Lee, Joshua B. Fryman, Ju...
96
Voted
HPCA
2006
IEEE
15 years 9 months ago
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads
With the continuing growth in the amount of genetic data, members of the bioinformatics community are developing a variety of data-mining applications to understand the data and d...
Aamer Jaleel, Matthew Mattina, Bruce L. Jacob
Distributed And Parallel Computing
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