117
Voted
FCCM
15 years 9 months ago
2006 IEEE 
We present an architecture and an implementation of an FPGA-based sparse matrix-vector multiplier (SMVM) for use in the iterative solution of large, sparse systems of equations ar...
140
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VLSID
16 years 3 months ago
2006 IEEE 
Logarithmic Number Systems (LNS) offer a viable alternative in terms of area, delay and power to binary number systems for multiplication and division operations in signal process...
157
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DFT
15 years 9 months ago
2006 IEEE 
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
137
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FCCM
15 years 6 months ago
2006 IEEE
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
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VLSI