Sciweavers

ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
15 years 3 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu
ISVLSI
2006
IEEE
149views VLSI» more  ISVLSI 2006»
15 years 3 months ago
Defect-Aware Design Paradigm for Reconfigurable Architectures
With advances in process technology, the feature sizes are decreasing, which leads to higher defect densities. More sophisticated techniques, at increased costs are required to av...
Rahul Jain, Anindita Mukherjee, Kolin Paul
ISVLSI
2006
IEEE
137views VLSI» more  ISVLSI 2006»
15 years 3 months ago
Low Power Layered Space-Time Channel Detector Architecture for MIMO Systems
This paper presents the low power implementation of a Maximum Likelihood (ML) based detector used in the receiver part of a Multiple Input and Multiple Output (MIMO) systems. Low ...
T. Takahashi, Ahmet T. Erdogan, Tughrul Arslan, J....
ISVLSI
2006
IEEE
129views VLSI» more  ISVLSI 2006»
15 years 3 months ago
Connection-oriented Multicasting in Wormhole-switched Networks on Chip
Network-on-Chip (NoC) proposes networks to replace buses as a scalable global communication interconnect for future SoC designs. However, a bus is very efficient in broadcasting....
Zhonghai Lu, Bei Yin, Axel Jantsch
88
Voted
ISVLSI
2006
IEEE
129views VLSI» more  ISVLSI 2006»
15 years 3 months ago
Dependability Analysis of Nano-scale FinFET circuits
FinFET technology has been proposed as a promising alternative for deep sub-micro bulk CMOS technology, because of its better scalability. Previous work have studied the performan...
Feng Wang 0004, Yuan Xie, Kerry Bernstein, Yan Luo
VLSI
Top of PageReset Settings