136
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ISVLSI
15 years 7 months ago
2007 IEEE 
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
ISVLSI
15 years 7 months ago
2007 IEEE
The new design challenges imposed by the increasing difficulties of today’s electronic systems obligated designers to develop new methodologies. System-level design and Platfor...
ISVLSI
15 years 7 months ago
2007 IEEE 
In this work, we present a genetic algorithm based automated circuit synthesis framework for passive analog circuits. A procedure is developed for the simultaneous generation of b...
106
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ISVLSI
15 years 7 months ago
2007 IEEE
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
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VLSI