158
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GLVLSI
15 years 10 months ago
2007 IEEE 
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
171
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GLVLSI
15 years 10 months ago
2007 IEEE 
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
127
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GLVLSI
15 years 8 months ago
2007 IEEE 
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
132
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GLVLSI
15 years 10 months ago
2007 IEEE
In this paper, two new dual-path based area efficient loop filter circuits are proposed for Charge Pump Phase Locked Loop (CPPLL). The proposed circuits were designed in 0.25µ CS...
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VLSI