201
click to vote
GLVLSI
15 years 2 months ago
2009 IEEE 
To assist in dynamic assertion-based verification, we present a method to automatically build a test vector generator from a temporal property. Based on the duality between monito...
177
click to vote
FCCM
15 years 9 months ago
2009 IEEE 
Abstract--The Cibola Flight Experiment (CFE) is an experimental small satellite developed at the Los Alamos National Laboratory to demonstrate the feasibility of using FPGA-based r...
153
click to vote
FCCM
15 years 9 months ago
2009 IEEE
This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
168
click to vote
RECONFIG
15 years 12 months ago
2009 IEEE
Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGA...
174
click to vote
GLVLSI
15 years 2 months ago
2009 IEEE
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...
|
VLSI