165
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GLVLSI
15 years 21 days ago
2009 IEEE 
To assist in dynamic assertion-based verification, we present a method to automatically build a test vector generator from a temporal property. Based on the duality between monito...
144
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FCCM
15 years 6 months ago
2009 IEEE 
Abstract--The Cibola Flight Experiment (CFE) is an experimental small satellite developed at the Los Alamos National Laboratory to demonstrate the feasibility of using FPGA-based r...
120
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FCCM
15 years 6 months ago
2009 IEEE
This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
140
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RECONFIG
15 years 9 months ago
2009 IEEE
Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGA...
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VLSI