146
Voted
GLVLSI
14 years 10 months ago
2009 IEEE 
To assist in dynamic assertion-based verification, we present a method to automatically build a test vector generator from a temporal property. Based on the duality between monito...
132
Voted
GLVLSI
14 years 10 months ago
2009 IEEE 
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...
169
Voted
GLVLSI
15 years 3 months ago
2009 IEEE 
In this paper, a novel design is proposed for eliminating glitches and signal bounces during wake-up events that result from incorporating multi-threshold CMOS (MTCMOS) into async...
135
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GLVLSI
15 years 7 months ago
2009 IEEE 
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
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VLSI