256
click to vote
GLVLSI
15 years 5 months ago
2009 IEEE
To assist in dynamic assertion-based verification, we present a method to automatically build a test vector generator from a temporal property. Based on the duality between monito...
244
Voted
GLVLSI
15 years 5 months ago
2009 IEEE
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...
446
Voted
GLVLSI
15 years 11 months ago
2009 IEEE 263
Voted
GLVLSI
15 years 10 months ago
2009 IEEE
In this paper, a novel design is proposed for eliminating glitches and signal bounces during wake-up events that result from incorporating multi-threshold CMOS (MTCMOS) into async...
228
Voted
GLVLSI
16 years 2 months ago
2009 IEEE
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
|