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GLVLSI
2007
IEEE
173views VLSI» more  GLVLSI 2007»
8 years 3 months ago
Modeling and estimating leakage current in series-parallel CMOS networks
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
Paulo F. Butzen, André Inácio Reis, ...
GLVLSI
2007
IEEE
186views VLSI» more  GLVLSI 2007»
8 years 3 months ago
Block placement to ensure channel routability
Given a set of placed blocks, we present an algorithm that minimally spaces the blocks to ensure routability under several assumptions. By performing a binary search on total widt...
Shigetoshi Nakatake, Zohreh Karimi, Taraneh Taghav...
FCCM
2007
IEEE
168views VLSI» more  FCCM 2007»
8 years 3 months ago
Discrete-Time Cellular Neural Networks in FPGA
This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions o...
J. Javier Martínez-Álvarez, F. Javie...
GLVLSI
2010
IEEE
141views VLSI» more  GLVLSI 2010»
8 years 3 months ago
Energy-efficient redundant execution for chip multiprocessors
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...
GLVLSI
2010
IEEE
168views VLSI» more  GLVLSI 2010»
8 years 3 months ago
A revisit to voltage partitioning problem
We revisit voltage partitioning problem when the mapped voltages of functional units are predetermined. If energy consumption is estimated by formulation E = CV 2 , a published wo...
Tao Lin, Sheqin Dong, Bei Yu, Song Chen, Satoshi G...
GLVLSI
2010
IEEE
296views VLSI» more  GLVLSI 2010»
8 years 3 months ago
AOP-based high-level power estimation in SystemC
The paper presents a novel high-level power modeling and estimation framework. The approach is based on a synergic integration of aspect-oriented programming(AOP) and SystemC. Mac...
Feng Liu, QingPing Tan, Xiaoyu Song, Naeem Abbasi
GLVLSI
2008
IEEE
183views VLSI» more  GLVLSI 2008»
8 years 4 months ago
An analytical model for the upper bound on temperature differences on a chip
The main contribution of this work is an analytical model for finding the upper bound on the temperature difference among various locations on the die. The proposed model can be u...
Shervin Sharifi, Tajana Simunic Rosing
GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
8 years 4 months ago
Guided test generation for isolation and detection of embedded trojans in ics
Mainak Banga, Maheshwar Chandrasekar, Lei Fang, Mi...
GLVLSI
2008
IEEE
105views VLSI» more  GLVLSI 2008»
8 years 4 months ago
A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip
This paper presents a process variation tolerant, SoC ready, 1GS/s, 6 bit flash analog-to-digital converter (ADC) suitable for integration into nanoscale digital CMOS technologie...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
8 years 5 months ago
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Hayden Kwok-Hay So, Robert W. Brodersen
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