131
Voted
MICRO
15 years 4 months ago
1994 IEEE 
We examine two pipeline structures which are employed in commercial microprocessors. The first is the load-use interlock (LUI) pipeline, which employs an interlock to ensure corre...
122
Voted
MICRO
15 years 4 months ago
1994 IEEE 
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
119
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MICRO
15 years 4 months ago
1994 IEEE 
Branch instructions are recognized as a major impediment to exploiting instruction level parallelism. Even with sophisticated branch prediction techniques, many frequently execute...
117
Voted
MICRO
15 years 4 months ago
1994 IEEE 
Numerical applications frequently contain nested loop structures that process large arrays of data. The execution of these loop structures often produces memory preference pattern...
116
Voted
MICRO
15 years 4 months ago
1994 IEEE
High performance architectures have always had to deal with the performance-limiting impact of branch operations. Microprocessor designs are going to have to deal with this proble...
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